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s-8253c/d series www.sii-ic.com battery protection ic for 2-series or 3-series-cell pack ? seiko instruments inc., 2008-2010 rev.2.0 _00 seiko instruments inc. 1 the s-8253c/d series is a protection ics for 2-series or 3-series cell lithium-ion rechargeable battery and includes high- accuracy voltage detector and delay circuit. this ic is suitable for protecting lithium-ion battery packs from overcharge, overdischarge and overcurrent. ? features (1) high-accuracy voltage detection for each cell ? overcharge detection voltage n (n = 1 to 3) 3.9 v to 4.4 v (50 mv step) accuracy 25 mv ? overcharge release voltage n (n = 1 to 3) 3.8 v to 4.4 v *1 accuracy 50 mv ? overdischarge detection voltage n (n = 1 to 3) 2.0 v to 3.0 v (100 mv step) accuracy 80 mv ? overdischarge release voltage n (n = 1 to 3) 2.0 v to 3.4 v *2 accuracy 100 mv (2) three-level overcurrent detection (i ncluding load short circuiting detection) ? overcurrent detection voltage 1 0.05 v to 0.30 v (50 mv step) accuracy 25 mv ? overcurrent detection voltage 2 0.5 v (fixed) ? overcurrent detection voltage 3 1.2 v (fixed) (3) delay time (overcharge, overdischarge, overcurrent) is available by only using an internal circuit. (external capacitors are unnecessary). (4) charge / discharge operation can be inhibited by the control pin. (5) 0 v battery charge function ava ilable / unavailable are selectable. (6) high-voltage withstand devices absolute maximum rating 26 v (7) wide range of operating voltage 2 v to 24 v (8) wide range of oper ating temperature ? 40c to + 85c (9) low current consumption ? operation mode 28 a max. ( + 25c) ? power-down mode 0.1 a max. ( + 25c) (10) lead-free, sn100%, halogen-free *3 *1. overcharge release voltage = overcharge detection voltage ? overcharge hysteresis voltage (overcharge hysteresis voltage n (n = 1 to 3) can be selected in 0 v, or in 0.1 v to 0.4 v in 50 mv step.) *2. overdischarge release voltage = overdischarge detection voltage + overdischarge hysteresis voltage (overdischarge hysteresis voltage n (n = 1 to 3) can be selected in 0 v, or in 0.2 v to 0.7 v in 100 mv step.) *3. refer to ? product name structure ? for details. ? applications ? lithium-ion rechargeable battery packs ? lithium polymer rechargeable battery packs ? package ? 8-pin tssop
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 2 ? block diagrams 1. s-8253c series cop vdd dop vmp 95 k 900 k + ? + ? + ? oscillator, counter, controller 200 na ctl ctlh ctlm vc1 ? + + ? ? + + ? ? + + ? vc2 vss remark all diodes shown in figure are parasitic diodes. figure 1
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 3 2. s-8253d series cop vdd dop vmp 95 k 900 k + ? + ? + ? oscillator, counter, controller 200 na ctl ctlh ctlm vc1 ? + + ? ? + + ? ? + + ? vc2 vss remark all diodes shown in figure are parasitic diodes. figure 2
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 4 ? product name structure 1. product name 1. 1 environmental code = u, s s-8253 x xx ? t8t1 x environmental code u: lead-free (sn 100%), halogen-free s: lead-free, halogen-free package abbreviation and ic packing specifications *1 t8t1: 8-pin tssop, tape serial code *2 sequentially set from aa to zz product series name c: 2-cell d: 3-cell *1. refer to the tape specifications. *2. refer to the ? 3. product name list ?. 1. 2 environmental code = g s-8253 x xx ? t8t1 g z environmental code g: lead-free (for details, please contact our sales office) package abbreviation and ic packing specifications *1 t8t1: 8-pin tssop, tape serial code *2 sequentially set from aa to zz product series name c: 2-cell d: 3-cell fixed *1. refer to the tape specifications. *2. refer to the ? 3. product name list ?. 2. package drawing code package name package tape reel environmental code = g, s ft008-a-p-sd ft008-e-c-sd ft008-e-r-sd 8-pin tssop environmental code = u ft008-a-p- sd ft008-e-c-sd ft008-e-r-s1
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 5 3. product name list table 1 s-8253c series (for 2-serial cell) model no. overcharge detection voltage [v cu ] overcharge release voltage [v cl ] overdischarge detection voltage [v dl ] overdischarge release voltage [v du ] overcurrent detection voltage 1 [v iov1 ] 0 v battery charge function s-8253caa-t8t1 ?? 4.350 0.025 v 4.050 0.050 v 2.40 0.080 v 2.70 0.100 v 0.300 0.025 v available s-8253cad-t8t1 ?? 4.250 0.025 v 4.050 0.050 v 2.40 0.080 v 2.70 0.100 v 0.120 0.025 v available s-8253cah-t8t1 ?? 4.350 0.025 v 4.150 0.050 v 2.30 0.080 v 2.30 0.080 v 0.090 0.025 v available s-8253cai-t8t1 ?? 4.250 0.025 v 4.050 0.050 v 2.40 0.080 v 2.70 0.100 v 0.200 0.025 v available table 2 s-8253d series (for 3-series cell) model no. overcharge detection voltage [v cu ] overcharge release voltage [v cl ] overdischarge detection voltage [v dl ] overdischarge release voltage [v du ] overcurrent detection voltage 1 [v iov1 ] 0 v battery charge function s-8253daa-t8t1 ?? 4.350 0.025 v 4.050 0.050 v 2.40 0.080 v 2.70 0.100 v 0.300 0.025 v available s-8253dab-t8t1 ?? 4.300 0.025 v 4.050 0.050 v 2.70 0.080 v 3.00 0.100 v 0.200 0.025 v unavailable s-8253dad-t8t1y 4.250 0.025 v 4.050 0.050 v 2.40 0.080 v 2.70 0.100 v 0.120 0.025 v available s-8253dai-t8t1 ?? 4.350 0.025 v 4.150 0.050 v 2.20 0.080 v 2.40 0.100 v 0.160 0.025 v available s-8253dak-t8t1y 4.350 0.025 v 4.050 0.050 v 2.40 0.080 v 2.70 0.100 v 0.300 0.025 v available remark 1. ?? : gz or u y: s or u 2. please select products of environmental code = u for sn 100%, halogen-free products.
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 6 ? pin configuration table 3 s-8253c series pin no. symbol description 1 dop connection pin for discharge control fet gate (cmos output) dop cop vmp ctl vdd vc1 vc2 vss 8-pin tssop top view 1 2 3 4 8 7 6 5 2 cop connection pin for charge control fet gate (nch open-drain output) figure 3 3 vmp pin for voltage detection between vdd and vmp (detection pin for overcurrent) 4 ctl input pin for charge / discharge control signal, pin for shortening test time ( l : normal operation, h : inhibit charge / discharge m (v dd 1 / 2) : shorten test time) 5 vss input pin for negative power supply, connection pin for negative voltage of battery 2 6 vc2 no connection *1 7 vc1 connection pin for negative voltage of battery 1, for positive voltage of battery 2 8 vdd input pin for positive power supply, connection pin for positive voltage of battery 1 *1. no connection is electrically open. this pin can be connected to vdd or vss. remark refer to the package drawings for the external views. table 4 s-8253d series pin no. symbol description 1 dop connection pin for discharge control fet gate (cmos output) 2 cop connection pin for charge control fet gate (nch open-drain output) 3 vmp pin for voltage detection between vdd and vmp (detection pin for overcurrent) 4 ctl input pin for charge / discharge control signal, pin for shortening test time ( l : normal operation, h : inhibit charge / discharge, m (v dd 1 / 2) : shorten test time) 5 vss input pin for negative power supply, connection pin for negative voltage of battery 3 6 vc2 connection pin for negative voltage of battery 2, for positive voltage of battery 3 7 vc1 connection pin for negative voltage of battery 1, for positive voltage of battery 2 8 vdd input pin for positive power supply, connection pin for positive voltage of battery 1 remark refer to the package drawings for the external views.
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 7 ? absolute maximum ratings table 5 (ta = 25 c unless otherwise specified) item symbol applicable pins absolute maximum ratings unit input voltage between vdd and vss v ds ? v ss ? 0.3 to v ss + 26 v input pin voltage v in vc1, vc2 v ss ? 0.3 to v dd + 0.3 v vmp pin input voltage v vmp vmp v ss ? 0.3 to v ss + 26 v dop pin output voltage v dop dop v ss ? 0.3 to v dd + 0.3 v cop pin output voltage v cop cop v ss ? 0.3 to v vmp + 0.3 v ctl input pin voltage v in _ ctl ctl v ss ? 0.3 to v dd + 0.3 v 300 (when not mounted on board) mw power dissipation p d ? 700 *1 mw operating ambient temperature t opr ? ? 40 to + 85 c storage temperature t stg ? ? 40 to + 125 c *1. when mounted on board [mounted board] (1) board size : 114.3 mm 76.2 mm t1.6 mm (2) board name : jedec standard51-7 caution the absolute maximum ra tings are rated values exceeding whic h the product could suffer physical damage. these values must therefor e not be exceeded under any conditions. 0 50 100 150 600 400 200 0 power dissipation (p d ) [mw] ambient temperature (ta) [ c] 500 300 100 700 800 figure 4 power dissipation of package (when mounted on board)
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 8 ? electrical characteristics 1. characteristics other than detection delay time table 6 (1 / 2) (ta = 25 c unless otherwise specified) item symbol conditions min. typ. max. unit test condi- tion test circuit detection voltage overcharge detection voltage n v cun 3.90 v to 4.40 v, adjustable v cun ? 0.025 v cun v cun + 0.025 v 1 1 v cl v cu v cln ? 0.05 v cln v cln + 0.05 v 1 1 overcharge release voltage n v cln 3.80 v to 4.40 v, adjustable v cl = v cu v cln ? 0.025 v cln v cln + 0.025 v 1 1 overdischarge detection voltage n v dln 2.0 v to 3.0 v, adjustable v dln ? 0.080 v dln v dln + 0.080 v 1 1 v dl v du v dun ? 0.10 v dun v dun + 0.10 v 1 1 overdischarge release voltage n v dun 2.0 v to 3.40 v, adjustable v dl = v du v dun ? 0.08 v dun v dun + 0.08 v 1 1 overcurrent detection voltage 1 v iov1 0.05 v to 0.30 v, adjustable based on v dd v iov1 ? 0.025 v iov1 v iov1 + 0.025 v 2 1 overcurrent detection voltage 2 v iov2 based on v dd 0.40 0.50 0.60 v 2 1 overcurrent detection voltage 3 v iov3 based on v dd 0.9 1.2 1.5 v 2 1 temperature coefficient 1 *1 t coe1 ta = 0c to 50c *3 ? 1.0 0 1.0 mv / c ? ? temperature coefficient 2 *2 t coe2 ta = 0c to 50c *3 ? 0.5 0 0.5 mv / c ? ? 0 v battery charge function 0 v battery charge starting charger voltage v 0cha 0 v battery charging; available ? 0.8 1.5 v 12 5 0 v battery charge inhibition battery voltage v 0inh 0 v battery charging; unavailable 0.4 0.7 1.1 v 12 5 internal resistance resistance between vmp and vdd r vmd v1 = v2 = v3 *4 = 3.5 v, v vmp = v ss 70 95 120 k 6 2 resistance between vmp and vss r vms v1 = v2 = v3 *4 = 1.8 v, v vmp = v dd 450 900 1800 k 6 2
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 9 table 6 (2 / 2) (ta = 25 c unless otherwise specified) item symbol conditions min. typ. max. unit test condi- tion test circuit input voltage operating voltage between vdd and vss v dsop output voltage of dop and cop fixed 2 ? 24 v ? ? ctl input voltage ?h? v ctlh ? v dd ? 0.5 ? ? v 7 1 ctl input voltage ?l? v ctll ? ? ? v ss + 0.5 v 7 1 input current current consumption on operation i ope v1 = v2 = v3 *4 = 3.5 v ? 14 28 a 5 2 current consumption at power down i pdn v1 = v2 = v3 *4 = 1.5 v ? ? 0.1 a 5 2 vc1 pin current i vc1 v1 = v2 = v3 *4 = 3.5 v ? 0.3 0 0.3 a 9 3 vc2 pin current i vc2 v1 = v2 = v3 *4 = 3.5 v ? 0.3 0 0.3 a 9 3 ctl pin current ?h? i ctlh v1 = v2 = v3 *4 = 3.5 v, v ctl1 = v dd ? ? 0.1 a 8 3 ctl pin current ?l? i ctll v1 = v2 = v3 *4 = 3.5 v, v ctl1 = v ss ? 0.4 ?0.2 ? a 8 3 output current cop pin leakage current i coh v cop = 24 v ? ? 0.1 a 10 4 cop pin sink current i col v cop = v ss + 0.5 v 10 ? ? a 10 4 dop pin source current i doh v dop = v dd ? 0.5 v 10 ? ? a 11 4 dop pin sink current i dol v dop = v ss + 0.5 v 10 ? ? a 11 4 *1. voltage temperature coefficient 1 : overcharge detection voltage *2. voltage temperature coefficient 2 : overcurrent detection voltage 1 *3. since products are not screened at high and low temperatur e, the specification for this temperature range is guaranteed by design, not tested in production. *4. the s-8253c series does not have v3 because this ic is for 2-series cell battery protection.
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 10 2. detection delay time (1) s-8253caa, s-8253cad, s-8253cai , s-8253daa, s-8253dab, s-8253dad, s-8253dak table 7 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.92 1.15 1.38 s 3 1 overdischarge detection delay time t dl ? 115 144 173 ms 3 1 overcurrent detection delay time 1 t iov1 ? 7.2 9 10.8 ms 4 1 overcurrent detection delay time 2 t iov2 ? 3.6 4.5 5.4 ms 4 1 overcurrent detection delay time 3 t iov3 ? 220 300 380 s 4 1 (2) s-8253dai table 8 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.92 1.15 1.38 s 3 1 overdischarge detection delay time t dl ? 115 144 173 ms 3 1 overcurrent detection delay time 1 t iov1 ? 3.6 4.5 5.4 ms 4 1 overcurrent detection delay time 2 t iov2 ? 0.89 1.1 1.4 ms 4 1 overcurrent detection delay time 3 t iov3 ? 220 300 380 s 4 1 (3) s-8253cah table 9 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.92 1.15 1.38 s 3 1 overdischarge detection delay time t dl ? 115 144 173 ms 3 1 overcurrent detection delay time 1 t iov1 ? 14.5 18 22 ms 4 1 overcurrent detection delay time 2 t iov2 ? 3.6 4.5 5.4 ms 4 1 overcurrent detection delay time 3 t iov3 ? 220 300 380 s 4 1
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 11 ? test circuits 1. overcharge detection voltage 1, overcharge release voltage 1, overdischarge detection voltage 1, overdischarge release voltage 1 (test condition 1, test circuit 1) confirm that v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), v4 = 0 v, v5 = 0 v, and the cop and dop pins are ?l? (v dd 0.1 v or lower) (this status is referred to as the initial status). 1. 1 overcharge detection voltage 1 (v cu1 ), overcharge release voltage 1 (v cl1 ) overcharge detection voltage 1 (v cu1 ) is the voltage of v1 when the voltage of the cop pin is ?h? (v dd 0.9 v or more) after the v1 voltage has been gradually increased starting at the initial status. overcharge release voltage 1 (v cl1 ) is the voltage of v1 when the voltage at the cop pin is low after the v1 voltage has been gradually decreased. 1. 2 overdischarge detection voltage 1 (v dl1 ), overdischarge release voltage 1 (v du1 ) overdischarge detection voltage 1 (v dl1 ) is the voltage of v1 when the voltage of the dop pin is high after the v1 voltage has been gradually decreased starting at the in itial status. overdischarge release voltage 1 (v du1 ) is the voltage of v1 when the voltage at the dop pin is low after the v1 voltage has been gradually increased. by changing vn (n = 2: s-8253c series, n = 2, 3: s-8253d series) the overcharge detection voltage (v cun ), overcharge release voltage (v cln ), overdischarge detection voltage (v dln ), and overdischarge release voltage (v dun ) can be measured in the same way as when n = 1. 2. overcurrent detection voltage 1, overcurrent de tection voltage 2, overcurrent detection voltage 3 (test condition 2, test circuit 1) confirm that v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), v4 = 0 v, v5 = 0 v, and the cop pin and dop pin are low (this status is referred to as the initial status). 2. 1 overcurrent detection voltage 1 (v iov1 ) overcurrent detection voltage 1 (v iov1 ) is the voltage of v5 when the voltages of the cop pin and dop pin are high after the v5 voltage has been gradually increased starting at the initial status. 2. 2 overcurrent detection voltage 2 (v iov2 ) overcurrent detection voltage 2 (v iov2 ) is a voltage at v5 when; by increasing a voltage at v5 instantaneously (within 10 s) from the initial state, the voltages of the cop and dop pin are set to ?h?, and its delay time is in the range of minimum to maximum value of overcurrent detection delay time 2 (t iov2 ). 2. 3 overcurrent detection voltage 3 (v iov3 ) overcurrent detection voltage 3 (v iov3 ) is a voltage at v5 when; by increasing a voltage at v5 instantaneously (within 10 s) from the initial state, the voltages of the cop and dop pin are set to ?h?, and its delay time is in the range of minimum to maximum value of overcurrent detection delay time 3 (t iov3 ).
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 12 3. overcharge detection delay time, overdischarge detection delay time (test condition 3, test circuit 1) confirm that v1 = v2 = 3.5 v (in s-8253c series), v1 = v2 = v3 = 3.5 v (in s-8253d series), v4 = 0 v, v5 = 0 v, and the cop pin and dop pin are low (this status is referred to as the initial status). 3. 1 overcharge detection delay time (t cu ) the overcharge detection delay time (t cu ) is the time it takes for the voltage of the cop pin to change from low to high after the voltage of v1 is instantaneously changed from overcharge detection voltage 1 (v cu1 ) ? 0.2 v to overcharge detection voltage 1 (v cu1 ) + 0.2 v (within 10 s) starting at the initial status. 3. 2 overdischarge detection delay time (t dl ) the overdischarge detection delay time (t dl ) is the time it takes for the voltage of the dop pin to change from low to high after the voltage of v1 is instantaneously changed from overdischarge detection voltage 1 (v dl1 ) + 0.2 v to overdischarge detection voltage 1 (v dl1 ) ? 0.2 v (within 10 s) starting at the initial status. 4. overcurrent detection delay time 1, det ection delay time 2, detection delay time 3 (test condition 4, test circuit 1) confirm that v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), v4 = 0 v, v5 = 0 v, and the cop pin and dop pin are low (this status is referred to as the initial status). 4. 1 overcurrent detection delay time 1 (t iov1 ) overcurrent detection delay time 1 (t iov1 ) is the time it takes for the voltage of the dop pin to change from low to high after the voltage of v5 is instantaneously changed to 0.35 v (within 10 s) starting at the initial status. 4. 2 overcurrent detection delay time 2 (t iov2 ) overcurrent detection delay time 2 (t iov2 ) is the time it takes for the voltage of the dop pin to change from low to high after the voltage of v5 is instantaneously changed to 0.7 v (within 10 s) starting at the initial status. 4. 3 overcurrent detection delay time 3 (t iov3 ) overcurrent detection delay time 3 (t iov3 ) is the time it takes for the voltage of the dop pin to change from low to high after the voltage of v5 is instantaneously changed to 1.6 v (within 10 s) starting at the initial status. 5. consumption on operation, power consumption at power-down (test condition 5, test circuit 2) 5. 1 power consumption on operation (i ope ) the power consumption during operation (i ope ) is the current of the vss pin (i ss ) when v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), s1 = on, and s2 = off. 5. 2 power consumption at power-down (i pdn ) the power consumption at power-down (i pdn ) is the current of the vss pin (i ss ) when v1 = v2 = 1.5 v (s-8253c series), v1 = v2 = v3 = 1.5 v (s-8253d series), s1 = off, and s2 = on.
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 13 6. resistance between vmp and vdd, resistance between vmp and vss (test condition 6, test circuit 2) confirm that v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), s1 = on, and s2 = off (this status is referred to as the initial status). 6. 1 resistance between vmp and vdd (r vmd ) the resistance between vmp and vdd (r vmd ) is determined based on the current of the vmp pin (i vmd ) after s1 and s2 are switched to off and on, respectively, starting at the initial status. s-8253c series : r vmd = (v1 + v2) / i vmd s-8253d series : r vmd = (v1 + v2 + v3) / i vmd 6. 2 resistance between vmp and vss (r vms ) the resistance between vmp and vss (r vms ) is determined based on the current of the vmp pin (i vms ) after v1 = v2 = 1.8 v (s-8253c series) or v1 = v2 = v3 = 1.8 v (s-8253d series) are set starting at the initial status. s-8253c series : r vms = (v1 + v2) / i vms s-8253d series : r vms = (v1 + v2 + v3) / i vms 7. ctl pin input voltage ?h? (test condition 7, test circuit 1) confirm that v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), v4 = 0 v, v5 = 0 v, and the cop pin and dop pin are low (this status is referred to as the initial status). 7. 1 ctl pin input voltage ?h? (v ctlh ) the ctl pin input voltage ?h? (v ctlh ) is the voltage of v4 when the voltages of the cop pin and dop pin are high after the voltage of v4 has been gradually increased starting at the initial status. 8. ctl pin input voltage ?l? (test condition 7, test circuit 1) confirm that v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), v4 = 0 v, v5 = 0.35 v, and the cop pin and dop pin are high (this status is referred to as the initial status). 8. 1 ctl pin input voltage ?l? (v ctll ) the ctl pin input voltage ?l? (v ctll ) is the voltage of v4 when the voltages of the cop pin and dop pin are low after the voltage of v4 has been gradually increased starting at the initial status. 9. ctl pin current ?h?, ctl pin current ?l? (test condition 8, test circuit 3) 9. 1 ctl pin current ?h? (i ctlh ), ctl pin current ?l? (i ctll ) the ctl pin current ?h? (i ctlh ) is the current that flows through the ctl pin when v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), and s3 = on, s4 = off. the ctl pin current ?l? (i ctll ) is the current that flows through the ctl pin when s3 = off and s4 = on after that.
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 14 10. vc1 pin current, vc2 pin current (test condition 9, test circuit 3) 10. 1 vc1 pin current (i vc1 ), vc2 pin current (i vc2 ) the vc1 pin current (i vc1 ) is the current that flows through the vc1 pin when v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), and s3 = off, s4 = on. similarly, the vc2 pin current (i vc2 ) is the current that flows through the vc2 pin under these conditions (s-8253d series only). 11. cop pin leakage current, cop pin sink current (test condition 10, test circuit 4) 11. 1 cop pin leakage current (i coh ) the cop pin leakage current (i coh ) is the current that flows through the cop pin when v1 = v2 = 12 v (s-8253c series), v1 = v2 = v3 = 8 v (s-8253d series), s6 = s7 = s8 = off, and s5 = on. 11. 2 cop pin sink current (i col ) the cop pin sink current (i col ) is the current that flows through the cop pin when v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), v6 = 0.5 v, s5 = s7 = s8 = off, and s6 = on. 12. dop pin source current, dop pin sink current (test condition 11, test circuit 4) 12. 1 dop pin source current (i doh ) the dop pin source current (i doh ) is the current that flows through the dop pin when v1 = v2 = 1.8 v (s-8253c series), v1 = v2 = v3 = 1.8 v (s-8253d series), v7 = 0.5 v, s5 = s6 = s8 = off, and s7 = on. 12. 2 dop pin sink current (i dol ) the dop pin sink current (i dol ) is the current that flows through the dop pin when v1 = v2 = 3.5 v (s-8253c series), v1 = v2 = v3 = 3.5 v (s-8253d series), v8 = 0.5 v, s5 = s6 = s7 = off, and s8 = on. 13. 0 v battery charge starting battery charger voltage (product with 0 v battery charge function), 0 v battery charge inhibition battery voltage (product with 0 v battery charge inhibition function) (test condition 12, test circuit 5) 13. 1 0 v battery charge starting battery charger voltage (v 0cha ) (product with 0 v battery charge function) the cop pin voltage should be lower than v 0cha max. ? 1 v when v1 = v2 = 0 v (s-8253c series), v1 = v2 = v3 = 0 v (s-8253d series), and v9 = v vmp = v 0cha max. 13. 2 0 v battery charge inhibition battery voltage (v 0inh ) (product with 0 v battery charge inhibition function) the cop pin voltage should be higher than v vmp ? 1 v when v1 = v2 = v 0inh min. (s-8253c series), v1 = v2 = v3 = v 0inh min. (s-8253d series), and v9 = v vmp = 24 v.
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 15 v5 1 m dop 1 cop 2 vmp 3 ctl 4 8 vdd 7 vc1 6 vc2 5 vss v v 1 f v2 v4 v1 s-8253c v5 1 m v v 1 f v2 v4 v1 dop 1 cop 2 vmp 3 ctl 4 8 vdd 7 vc1 6 vc2 5 vss s-8253d v3 figure 5 test circuit 1 s1 dop 1 cop 2 vmp 3 ctl 4 8 vdd 7 vc1 6 vc2 5 vss a 1 f v2 s2 v1 s-8253c a s1 dop 1 cop 2 vmp 3 ctl 4 8 vdd 7 vc1 6 vc2 5 vss a 1 f v2 s2 v1 s-8253d a v3 figure 6 test circuit 2 s3 dop 1 cop 2 vmp 3 ctl 4 8 vdd 7 vc1 6 vc2 5 vss a 1 f v2 s4 v1 s-8253c a s3 dop 1 cop 2 vmp 3 ctl 4 8 vdd 7 vc1 6 vc2 5 vss a 1 f v2 s4 v1 s-8253d a a v3 figure 7 test circuit 3
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 16 s5 dop 1 cop 2 vmp 3 ctl 4 8 vdd 7 vc1 6 vc2 5 vss a 1 f v2 s6 v1 s-8253c a v8 s7 s8 v6 v7 s5 dop 1 cop 2 vmp 3 ctl 4 8 vdd 7 vc1 6 vc2 5 vss a 1 f v2 s6 v1 s-8253d a v8 s7 s8 v6 v7 v3 figure 8 test circuit 4 1 m dop 1 cop 2 vmp 3 ctl 4 8 vdd 7 vc1 6 vc2 5 vss v 1 f v2 v9 v1 s-8253c 1 m dop 1 cop 2 vmp 3 ctl 4 8 vdd 7 vc1 6 vc2 5 vss v 1 f v2 v9 v1 s-8253d v3 figure 9 test circuit 5
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 17 ? operation remark refer to ? ? battery protection ic connection example ?. 1. normal status when all of the battery voltages are in the range from v dln to v cun and the discharge current is lower than the specified value (the vmp pin voltage is higher than v dd ? v iov1 ), the charging and discharging fets are turned on. this condition is called the normal status, and in this condition charging and discharging can be carried out freely. caution when the battery is connected for the first time, discharging may not be enabled. in this case, short the vmp pin and vdd pin or connect the charger to restore the normal status. 2. overcharge status when any one of the battery voltages becomes higher than v cun and the state continues for t cu or longer, the cop pin becomes high impedance. because the cop pin is pulled up to the eb + pin voltage by an external resistor, the charging fet is turned off to stop charging. this is called the overcharge status. the overcharge status is released when one of the following two conditions holds. (1) all battery voltages become v cln or lower. (2) all of the battery voltages are v cun or lower, and the vmp pin voltage is v dd ? v iov1 or lower (since the discharge current flows through the body diode of the c harging fet immediately after discharging is started when the charger is removed and a load is connected, the vmp pin voltage momentarily decreases by approximately 0.6 v from the vdd pin voltage. the ic detects this voltage and releases the overcharging status). 3. overdischarge status when any one of the battery voltages becomes lower than v dln and the state continues for t dl or longer, the dop pin voltage becomes v dd level, and the discharging fet is turned off to stop discharging. this is called the overdischarging status. after discharging is stopped due to the overdischarge status, the s-8253c/d series enters the power-down status. 4. power-down status when discharging has stopped due to the overdischarge status, the vmp pin is pulled down to the v ss level by the r vms resistor. when the vmp pin voltage is lower than typ. 0.8 v, the s-8253c/d series enters the power-down status. in the power-down status, almost all the circui ts of the s-8253c/d series stop and the current consumption is i pdn or lower. the conditions of each output pin are as follows. (1) cop pin : high-z (2) dop pin : v dd the power-down status is released when the following condition holds. (1) the vmp pin voltage is typ. 0.8 v or higher. the overdischarging status is released when the following two conditions hold. (1) all battery voltage is released at v dun or higher when the vmp pin voltage is typ. 0.8 v or higher and the vmp pin voltage is lower than v dd . (2) all battery voltage is released at v dln or higher when the vmp pin voltage is typ. 0.8 v or higher and the vmp pin voltage is v dd or higher (when a charger is connected and vmp pin voltage is v dd or higher, overdischarge hysteresis is released and electr ic discharge control fet is turned on at v dln ).
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 18 5. overcurrent status the s-8253c/d series has three overcurrent detection levels (v iov1 , v iov2 , and v iov3 ) and three overcurrent detection delay times (t iov1 , t iov2 , and t iov3 ) corresponding to each overcurrent detection level. when the discharging current becomes higher than the specified value (the difference of the voltages of the vmp pin and vdd pin is greater than v iov1 ) and the state continues for t iov1 or longer, the s-8253c/d series enters the overcurrent status, in which the dop pin voltage becomes v dd level to turn off the discharging fet to stop discharging, the cop pin becomes high impedance and is pulled up to the eb + pin voltage to turn off the charging fet to stop charging, and the vmp pin is pulled up to the v dd voltage by the internal resistor (r vmd ). operation of overcurrent detection levels 2, 3 (v iov2 , v iov3 ) and overcurrent detection delay times 2, 3 (t iov2 , t iov3 ) are the same as for v iov1 and t iov1 . the overcurrent status is released when the following condition holds. (1) the vmp pin voltage is v dd ? v iov1 or higher because a charger is c onnected or the load is released. caution the impedance that enables automatic restoration varies depending on the battery voltage and set value of overcurrent detection voltage 1. 6. 0 v battery charge function regarding the charging of a self-discharged battery (0 v batte ry), the s-8253c/d series has two functions from which one should be selected. (1) 0 v battery charging is allowed (0 v battery charging is available.) when the charger voltage is higher than v 0cha , the 0 v battery can be charged. (2) 0 v battery charging is inhibited (0 v battery charging is unavailable.) when one of the battery voltages is lower than v 0inh , the 0 v battery cannot be charged. caution when the vdd pin voltage is lower than the minimum value of v dsop , the operation of the s- 8253c/d series is not guaranteed.
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 19 7. delay circuit the following detection delay times are determined by dividing a clock of approximately 3.57 khz by the counter. (example) oscillator clock cycle (t clk ) : 280 s overcharge detection delay time (t cu ) : 1.15 s overdischarge detection delay time (t dl ) : 144 ms overcurrent detection delay time 1 (t iov1 ) : 9 ms overcurrent detection delay time 2 (t iov2 ) : 4.5 ms remark the overcurrent detection delay time 2 (t iov2 ) and overcurrent detection delay time 3 (t iov3 ) start when the overcurrent detection voltage 1 (v iov1 ) is detected. as soon as the overcurrent detection voltage 2 (v iov2 ) or overcurrent detection voltage 3 (v iov3 ) is detected over the detection delay time for overcurrent 2 (t iov2 ) or overcurrent 3 (t iov3 ) after the detection of overcurrent 1 (v iov1 ), the s-8253c/d series turns the discharging control fet off within t iov2 or t iov3 of each detection. v dd dop pin voltage v ss overcurrent detection delay time 2 (t iov2 ) v iov1 time v dd vmp pin voltage v ss time v iov2 v iov3 t d 0 t d t iov2 figure 10 8. ctl pin the s-8253c/d series has a control pin for charge / discharge control and reducing test time. the levels, ?l?, ?h?, and ?m?, of the voltage input to the ctl pin determine the status of the s-8253c/d series: normal operation, charge / discharge inhibition, or test time reduction. the ctl pin takes precedence over the battery protection circuit. during normal use, short the ctl pin and vss pin. table 10 conditions set by ctl pin ctl pin potential status of ic cop pin dop pin open charge / discharge inhibited status high-z v dd high (v ctl v ctlh ) charge / discharge inhibited status high-z v dd middle (v ctll < v ctl < v ctlh ) status to shorten delay time *1 ( *2 ) ( *2 ) low (v ctll v ctl ) normal status ( *2 ) ( *2 ) *1. in this status that delay time is shortened, only the overcharge detection delay time is shortened in 1/60 to 1/30. *2. the pin status is controlled by the voltage detection circuit. caution 1. if the potential of the ctl pin is middle, overcurrent detection voltage 1 (v iov1 ) does not operate. 2. if you use the middle potential of the ctl pin, contact sii marketing department. 3. please note unexpected behavior might occur when electrical potential difference between the ctl pin (?l? level) a nd vss is generated through the external filter (r vss and c vss ) as a result of input voltage fluctuations.
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 20 ? timing chart 1. overcharge detection and overdischarge detection (n = 1 to 3) v cun v dun v dln v cln battery voltage high-z v ss cop pin voltage v dd dop pin voltage v ss charger connection load connection status *1 overcharge detection delay time ( t cu ) < 1 > < 2 > < 1 > < 4 > < 1 > v iov1 v ss vmp pin voltage v dd v eb+ v eb+ v hc v hd high-z 0.8 v < 3 > overdischarge detection delay time ( t dl ) *1. < 1 > : normal status < 2 > : overcharge status < 3 > : overdischarge status < 4 > : power-down status remark the charger is assumed to c harge with a constant current. v eb+ indicates the open voltage of the charger. figure 11
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 21 2. overcurrent detection v cun v dun v dln (n = 1 to 3) v cln battery voltage v hc v hd v dd dop pin voltage v ss high-z v eb+ v ss cop pin voltage high-z high-z vmp pin voltage load connection status *1 overcurrent detection delay time 1 ( t iov1 ) < 1 > < 2 > < 1 > < 1 > overcurrent detection delay time 2 ( t iov2 ) overcurrent detection delay time 3 ( t iov3 ) < 2 > < 1 > < 2 > v dd v iov1 v iov2 v iov3 v ss *1. < 1 > : normal status < 2 > : overcurrent status remark the charger is assumed to char ge with a constant current. v eb+ indicates the open voltage of the charger. figure 12
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 22 ? battery protection ic connection example 1. s-8253c series eb+ r cop r vmp r dop r ctl eb? 1dop 2cop 3vmp 4ctl 8 vdd 7 vc1 6 vc2 5 vss s-8253c r vc1 c vss c vc1 r vss charging fet discharging fet ctl figure 13 2. s-8253d series eb+ r cop r vmp r dop r ctl eb? 1dop 2cop 3vmp 4ctl 8vdd 7vc1 6vc2 5 vss s-8253d r vc1 c vc2 c vss c vc1 r vc2 r vss charging fet discharging fet ctl figure 14
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 23 table 11 constants for external components no. symbol typ. range unit 1 r vc1 1 0.51 to 1 *1 k 2 r vc2 1 0.51 to 1 *1 k 3 r dop 5.1 2 to 10 k 4 r cop 1 0.1 to 1 m 5 r vmp 5.1 1 to 10 k 6 r ctl 1 1 to 100 k 7 r vss 51 5.1 to 51 *1 8 c vc1 0.1 0.1 to 0.47 *1 f 9 c vc2 0.1 0.1 to 0.47 *1 f 10 c vss 2.2 1 to 10 *1 f *1. please set up a filter constant to be r vss c vss 51 f ? and to be r vc1 c vc1 = r vc2 c vc2 = r vss c vss . caution 1. the above constants may be changed without notice. 2. it has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. in addi tion, the example of connection s hown above and the constant do not guarantee proper operation. perform thorough evaluation using the actual application to set the constant.
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 24 ? precautions ? the application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. ? batteries can be connected in any order, however, t here may be cases when discharging cannot be performed when a battery is connected. in this case, short the vmp pin and vdd pin or connect the battery charger to return to the normal mode. ? do not apply an electrostatic discharge to this ic that exceeds the performance ratings of the built-in electrostatic protection circuit. ? sii claims no responsibility for any dis putes arising out of or in connection with any infringement by products including this ic of patents owned by a third party.
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 25 ? characteristics (typical data) 1. current consumption 1. 1 i ope vs. v dd 0 5 10 15 20 40 35 30 25 20 15 10 5 0 i ope [ a] (s-8253caa) v dd [v] 0 5 10 15 20 40 35 30 25 20 15 10 5 0 (s-8253daa) i ope [ a] v dd [v] 1. 2 i ope vs. ta ? 40 ? 25 0 25 50 75 85 40 35 30 25 20 15 10 5 0 i ope [ a] ta [ c] (s-8253caa) ? 40 ? 25 0 25 50 75 85 40 35 30 25 20 15 10 5 0 i ope [ a] ta [ c] (s-8253daa) 1. 3 i pdn vs. v dd 0 5 10 15 20 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 i pdn [ a] v dd [v] (s-8253caa) 0 5 10 15 20 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 i pdn [ a] (s-8253daa) v dd [v] 1. 4 i pdn vs. ta ? 40 ? 25 0 25 50 75 85 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 i pdn [ a] (s-8253caa) ta [ c] 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 (s-8253daa) i pdn [ a] ta [ c] ? 40 ? 25 0 25 50 75 85
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 26 2. overcharge detection / release voltage, overdischarge detection / release voltage, overcurrent detection voltage, and delay times (s-8253caa, s-8253daa) 2. 1 v cu vs. ta 2. 2 v cl vs. ta 4.375 4.370 4.365 4.360 4.355 4.350 4.345 4.340 4.335 4.330 4.325 ? 40 ? 25 0 25 50 7585 v cu [ a] ta [ c] 4.10 4.09 4.08 4.07 4.06 4.05 4.04 4.03 4.02 4.01 4.00 v cl [ a] ? 40 ? 25 0 25 50 75 85 ta [ c] 2. 3 v du vs. ta 2. 4 v dl vs. ta 2.80 2.78 2.76 2.74 2.72 2.70 2.68 2.66 2.64 2.62 2.60 v du [ a] ? 40 ? 25 0 25 50 75 85 ta [ c] 2.48 2.46 2.44 2.42 2.40 2.38 2.36 2.34 2.32 v dl [ a] ? 40 ? 25 0 25 50 75 85 ta [ c] 2. 5 t cu vs. ta 2. 6 t dl vs. ta 1320 1220 1120 1020 920 1380 t cu [ms] ? 40 ? 25 0 25 50 75 85 ta [ c] 165 155 145 135 125 115 173 t dl [ms] ? 40 ? 25 0 25 50 75 85 ta [ c] 2. 7 v iov1 vs. v dd 2. 8 v iov1 vs. ta 0.325 0.320 0.315 0.310 0.305 0.300 0.295 0.290 0.285 0.280 0.275 7 8 10 11 12 9 13 v iov1 [v] v dd [v] 0.325 0.320 0.315 0.310 0.305 0.300 0.295 0.290 0.285 0.280 0.275 ? 40 ? 25 0 25 50 75 85 ta [ c] v iov1 [v]
battery protection ic for 2-series or 3-series-cell pack rev.2.0 _00 s-8253c/d series seiko instruments inc. 27 2. 9 v iov2 vs. v dd 2. 10 v iov2 vs. ta 0.60 0.58 0.56 0.54 0.52 0.50 0.48 0.46 0.44 0.42 0.40 7 8 10 11 12 9 13 v iov2 [v] v dd [v] 0.60 0.58 0.56 0.54 0.52 0.50 0.48 0.46 0.44 0.42 0.40 v iov2 [v] ? 40 ? 25 0 25 50 75 85 ta [ c] 2. 11 v iov3 vs. v dd 2. 12 v iov3 vs. ta 1.5 1.4 1.3 1.2 1.1 1.0 0.9 7 8 10 11 12 9 13 v iov3 [v] v dd [v] 1.5 1.4 1.3 1.2 1.1 1.0 0.9 v iov3 [v] ? 40 ? 25 0 25 50 75 85 ta [ c] 2. 13 t iov1 vs. v dd 2. 14 t iov1 vs. ta 10.8 10.4 10.0 9.6 9.2 8.8 8.4 8.0 7.6 7.2 7 8 10 11 12 9 13 v dd [v] t iov1 [ms] 10.8 10.4 10.0 9.6 9.2 8.8 8.4 8.0 7.6 7.2 t iov1 [ms] ? 40 ? 25 0 25 50 75 85 ta [ c] 2. 15 t iov2 vs. v dd 2. 16 t iov2 vs. ta 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4.0 3.8 3.6 t iov2 [ms] 7 8 10 11 12 9 13 v dd [v] 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4.0 3.8 3.6 t iov2 [ms] ? 40 ? 25 0 25 50 75 85 ta [ c]
battery protection ic for 2-series or 3-series-cell pack s-8253c/d series rev.2.0 _00 seiko instruments inc. 28 2. 17 t iov3 vs. v dd 2. 18 t iov3 vs. ta 0.38 0.36 0.34 0.32 0.30 0.28 0.26 0.24 0.22 t iov3 [ms] 7 8 10 11 12 9 13 v dd [v] 0.38 0.36 0.34 0.32 0.30 0.28 0.26 0.24 0.22 t iov3 [ms] ? 40 ? 25 0 25 50 75 85 ta [ c] 3. cop / dop pin (s-8253caa, s-8253daa) 3. 1 i coh vs. v cop 3. 2 i col vs. v cop 0.08 0.06 0.04 0.02 0 0 4 12 16 20 8 24 i coh [ a] v cop [v] 0.10 14 12 10 8 6 4 2 0 0 3. 10.5 7.0 i col [m a ] v cop [v] 3. 3 i doh vs. v dop 3. 4 i dol vs. v dop ? 0.5 ? 1.0 ? 1.5 ? 2.0 ? 2.5 0 1.8 5.4 3.6 i doh [m a ] v dop [v] 0 14 12 10 8 6 4 2 0 0 3.5 10.5 7.0 i dol [m a ] v dop [v]

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www.sii-ic.com ? the information described herein is subject to change without notice. ? seiko instruments inc. is not responsible for any pr oblems caused by circuits or diagrams described herein whose related industrial properties, patents, or ot her rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarant ee the success of any specific mass-production design. ? when the products described herein are regulated produ cts subject to the wassenaar arrangement or other agreements, they may not be exported without authoriz ation from the appropriate governmental authority. ? use of the information described he rein for other purposes and/or repr oduction or copying without the express permission of seiko instrum ents inc. is strictly prohibited. ? the products described herein cannot be used as par t of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. ? although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may oc cur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

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